********** Mapped Logic ********** |
CASINH_FRED_4 <= ((CASINH_MMU_16)
OR (NOT XLXN_368 AND NOT RW AND NOT MMU_17)); |
FREEZER_ROM <= NOT (((A12 AND NOT A14 AND NOT A15 AND NOT XLXN_282 AND XLXN_368)
OR (NOT A14 AND NOT A15 AND A13 AND NOT XLXN_282 AND XLXN_368) OR (NOT A14 AND NOT A15 AND A11 AND NOT XLXN_282 AND XLXN_368) OR (A6 AND A4 AND A1 AND A7 AND A5 AND A3 AND A12 AND A9 AND A8 AND A14 AND A10 AND A15 AND A13 AND A11 AND A0 AND NOT XLXN_282 AND XLXN_267 AND NOT XLXN_368 AND XLXN_349))); |
OS_ROM <= ((A12 AND NOT A14 AND NOT A15 AND NOT XLXN_282 AND XLXN_368)
OR (NOT A14 AND NOT A15 AND A13 AND NOT XLXN_282 AND XLXN_368) OR (NOT A14 AND NOT A15 AND A11 AND NOT XLXN_282 AND XLXN_368) OR (A6 AND A4 AND A1 AND A7 AND A5 AND A3 AND A12 AND A9 AND A8 AND A14 AND A10 AND A15 AND A13 AND A11 AND A0 AND NOT XLXN_282 AND XLXN_267 AND NOT XLXN_368 AND XLXN_349)); |
RAM_RA0 <= ((FRED32)
OR (NOT A12 AND NOT A14 AND NOT A15 AND NOT A13 AND NOT A11 AND NOT XLXN_282 AND PHI_2 AND XLXN_368)); |
RAM_RA5 <= ((FRED27)
OR (NOT A12 AND NOT A14 AND NOT A15 AND NOT A13 AND NOT A11 AND NOT XLXN_282 AND PHI_2 AND XLXN_368)); |
RAM_RA7 <= ((FRED25)
OR (NOT A12 AND NOT A14 AND NOT A15 AND NOT A13 AND NOT A11 AND NOT XLXN_282 AND PHI_2 AND XLXN_368)); |
FDCPE_XLXN_267: FDCPE port map (XLXN_267,NOT FREEZER,NMI,NOT XLXN_368/XLXN_368_RSTF__$INT,'0'); |
FTCPE_XLXN_282: FTCPE port map (XLXN_282,'1',NOT XLXN_282/XLXN_282_CLKF__$INT,NOT XLXN_368/XLXN_368_CLKF__$INT,'0'); |
XLXN_282/XLXN_282_CLKF__$INT <= ((A14 AND NOT PHI_1 AND NOT D7xx AND NOT RW)
OR (A15 AND NOT PHI_1 AND NOT D7xx AND NOT RW) OR (NOT XLXN_368 AND NOT PHI_1 AND NOT D7xx AND NOT RW) OR (NOT A12 AND NOT A13 AND NOT A11 AND NOT PHI_1 AND NOT D7xx AND NOT RW)); |
FDCPE_XLXN_349: FDCPE port map (XLXN_349,HALT,PHI_1,'0','0'); |
FDCPE_XLXN_368: FDCPE port map (XLXN_368,'1',NOT XLXN_368/XLXN_368_CLKF__$INT,NOT XLXN_368/XLXN_368_RSTF__$INT,'0'); |
XLXN_368/XLXN_368_CLKF__$INT <= (A6 AND A4 AND A1 AND A7 AND A5 AND A3 AND A12 AND A9 AND
A8 AND A14 AND A10 AND A15 AND A13 AND A11 AND A0 AND XLXN_267 AND NOT XLXN_368 AND XLXN_349); |
XLXN_368/XLXN_368_RSTF__$INT <= ((NOT RESET)
OR (NOT PHI_1 AND NOT D7xx AND RW)); |
Register Legend:
FDCPE (Q,D,C,CLR,PRE); FTCPE (Q,D,C,CLR,PRE); LDCP (Q,D,G,CLR,PRE); |